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17 January 2020

Lancaster University shows how InAs/AlSb resonant-tunnelling non-volatile memory consumes 100 times less switching energy than DRAM

Researchers in the Department of Physics of Lancaster University in the UK have demonstrated how their invention of a new type of memory device could transform the way computers, smartphones and other gadgets work (Dominic Lane and Manus Hayne, ‘Simulations of Ultralow-Power Nonvolatile Cells for Random-Access Memory’, IEEE Transactions on Electron Devices (2020) January issue; DOI: 10.1109/TED.2019.2957037).

In ‘universal memory’, data is very robustly stored, but can also easily be changed; something that had widely been considered to be unachievable. Currently, the two main types of memory - dynamic random-access memory (DRAM) and flash - have complementary characteristics and roles. DRAM is fast and is hence used for active (working) memory, but it is volatile so information is lost when power is removed. DRAM continually ‘forgets’ and needs to be constantly refreshed. Flash is non-volatile, allowing use in mobile devices but is very slow, so it is well-suited for data storage but can’t be used for active memory.

The paper shows how individual memory cells can be connected together in arrays to make RAM, and predicts that such chips would at least match the speed performance of DRAM, but do so 100 times more efficiently, and with the additional advantage of non-volatility.

The new non-volatile RAM (NVRAM), named ‘ULTRARAM’ (a compound semiconductor charge-storage memory that exploits quantum phenomena for its operational advantages), would be a working implementation of so-called ‘universal memory’, combining all the advantages of DRAM and flash but with none of the drawbacks, it is claimed. “The work published in this new paper represents a significant advance, providing a clear blueprint for the implementation of ULTRARAM memory,” reckons professor Manus Hayne, who is leading the research.

The Lancaster team says that it has solved the paradox of universal memory by exploiting the quantum mechanical effect of resonant tunnelling, which allows a barrier to switch from opaque to transparent by applying a small voltage.

The new work describes simulations of this process. These show that the new NVRAM device consumes very little power, with 100 times lower switching energy per unit area than DRAM, but with similar operating speeds.

Non-volatility is achieved due to the extraordinary band offsets of indium arsenide (InAs) and aluminium antimonide (AlSb), providing a large energy barrier (2.1 eV), which prevents the escape of electrons. Based on the simulation results, an NVRAM architecture is proposed for which extremely low disturb-rates are predicted as a result of the quantum-mechanical resonant-tunneling mechanism used to write and erase.

The work also proposes a readout mechanism for the memory cells that should improve the contrast between logic states by many orders of magnitude, allowing cells to be connected in large arrays. It also shows that the sharp transition between opacity and transparency of the resonant-tunnelling barrier facilitates a highly compact architecture with a high bit density.

On-going work is targeted at the manufacturability of working memory chips, including the fabrication of arrays of devices, the development of readout logic, the scaling of devices, and implementation on silicon.

Tags: DRAM

Visit: https://ieeexplore.ieee.org/document/8948343

Visit: www.lancaster.ac.uk

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