News: Microelectronics
13 February 2026
Navitas unveils fifth-generation SiC Trench-Assisted Planar MOSFET technology
Navitas Semiconductor Corp of Torrance, CA, USA — which provides GaNFast gallium nitride (GaN) and GeneSiC silicon carbide (SiC) power semiconductors — has launched its 5th-generation GeneSiC technology platform. The High Voltage (HV) SiC Trench-Assisted Planar (TAP) MOSFET technology is said to be a significant technological leap over previous generations and will deliver a 1200V line of MOSFETs. It complements Navitas’ ultra-high-voltage (UHV) 2300V and 3300V technologies from the 4th-generation GeneSiC platform, extending Navitas’ technology for AI data centers, grid and energy infrastructure, and industrial electrification.
The 5th-generation MOSFET platform features Navitas’ most compact TAP architecture yet, combining the ruggedness of a planar gate with what is claimed to be best-in-class performance figures of merit, enabled by a trench structure in the source region while also elevating the efficiency and life-time reliability for high-voltage power electronics.
The 5th-generation platform is said to achieve a new benchmark in power conversion through a 35% improved RDS,ON x QGD figure of merit (FoM), compared to the previous-generation 1200V technology. This improvement significantly slashes switching losses, allowing for cooler operation and higher frequency of operation in demanding power stages.
High-speed switching is further fortified by ~25% improvement to the QGD/QGS ratio. When paired with a stable high-threshold-voltage specification (VGS,TH ≥3V), this technology ensures immunity against parasitic turn-on, providing a robust and predictable gate drive even in high-noise environments.
The 5th-generation technology is said to deliver significant improvement in dynamic performance by optimizing the RDS(ON) x EOSS characteristic while also integrating a ‘soft body-diode’ technology to further enhance system stability by minimizing electromagnetic interference (EMI) and ensuring smoother commutation during high-speed switching cycles.
Qualification of this generation to AEC-Plus grade (exceeding AEC-Q101 and JEDEC standards for reliability testing) ensures long-term stability and durability for AI data-center, energy and grid infrastructure applications. Key reliability benchmarks include:
- extended stress testing: 3x longer duration for static high-temperature, high-voltage testing (HTRB, HTGB, and HTGB-R);
- advanced switching reliability testing: dynamic reverse bias (DRB) and dynamic gate switching (DGS) to represent stringent fast-switching application mission-profiles;
- industry-leading stability: lowest VGS,TH shift over extended switching stress periods for stable long-term efficiency;
- extreme gate oxide reliability: extrapolated gate-oxide failure time exceeding 1 million years at operating VGS at 18V and 175°C;
- enhanced cosmic-ray resilience: exceptionally low FIT (failure in time) rates, ensuring mission-critical reliability in high-altitude and high-uptime environments.
“Our customers are redefining the boundaries of power conversion in AI data centers and energy infrastructure, and Navitas is marching along with them in every step of the way,” says Paul Wheeler, VP & general manager of Navitas’ SiC business unit. “Significant technological improvements in our 5th-generation GeneSiC technology underscore Navitas’ commitment to delivering industry-leading performance and reliability in silicon carbide MOSFETs.”
A white paper on the Trench-Assisted Planar technology is available for free download from the Navitas site.
Navitas will be announcing new products in this 5th-generation technology platform during the coming months.
Navitas sampling 3300V and 2300V UHV silicon carbide product portfolio
