News: Optoelectronics
18 July 2025
Ayar strengthens leadership team and expands global presence to accelerate high-volume co-packaged optics
Silicon photonics-based chip-to-chip optical connectivity firm Ayar Labs of San Jose, CA, USA — which is pioneering co-packaged optics (CPO) for large-scale AI workloads — has expanded its leadership team with Vivek Khanzodé joining it as VP of engineering. To support its efforts in high-volume manufacturing and CPO adoption, the firm has also opened a new office in Taiwan and doubled the size of its San Jose headquarters, bolstering its aim to transform AI connectivity with optical interconnects.
“As the industry accelerates its shift toward CPO solutions, we are taking decisive steps to ensure Ayar Labs leads this market transition,” says co-founder & CEO Mark Wade. “Expanding in Taiwan places us at the center of the global semiconductor ecosystem, allowing us to access world-class talent and deepen partnerships with key industry players,” he adds. “Combined with the expertise of leaders like Vivek, we are ready to deliver the solutions customers need to revolutionize next-generation AI infrastructure.”
Khanzodé joins from Marvell Technology Inc, where he led its pre- and post-silicon validation for products that shipped in the hundreds of millions annually. A semiconductor executive with more than 30 years of engineering leadership experience, Khanzodé’s expertise in scaling complex semiconductor products will be instrumental as Ayar’s builds toward high-volume manufacturing and commercial adoption, the firm reckons.
Ayar says that its new office in Hsinchu, Taiwan will enable it to closely collaborate with the local Taiwan semiconductor ecosystem and leverage the region’s talent pool. Scott Clark, who joined as VP of manufacturing & operations nearly three years ago, will expand his role to include oversight of operations in Taiwan, basing himself in the country.
Expansion of the leadership team and global presence comes at a key time for Ayar. Earlier this year, it unveiled its industry-first UCIe optical interconnect chiplet for CPO, which is said to eliminate data bottlenecks by maximizing AI infrastructure performance and efficiency while reducing latency and power consumption. In addition, Ayar secured $155m in Series D funding from AMD, Intel Capital, NVIDIA, and others to address the need for scalable, cost-effective AI infrastructure.
Ayar says that it will be hiring for a number of engineering and related roles in the USA and Taiwan.
