AES Semigas


18 April 2024

EU-funded Chips JU selects four new pilot lines to be implemented in Europe

Chips Joint Undertaking (Chips JU) has announced the successful evaluation of the submitted semiconductor pilot line proposals and has started negotiations with four consortia, targeting the signing of corresponding agreements later this year. The step aims to catalyse innovation in the region and reinforce Europe’s technological leadership on the global stage.

Funded by the European Union (EU), Chips JU participating states and the private members, the Chips Joint Undertaking supports research, development, innovation and capacity building in the European semiconductor ecosystem. Launched by the European Union Council Regulation No 2021/1085 and amended in September 2023 via Council Regulation 2023/1782, it aims to contribute to reinforcing the competitiveness and resilience of the semiconductor technological and industrial base, engaging EU, national/regional and private industry funding of nearly €11bn.

The Public Authorities Board of the Chips Joint Undertaking has now selected the Hosting Consortia that – provided that negotiations are successful – will implement each of the four pilot lines, and will receive grants for the set-up, integration and process development, and for operational activities. The pilot lines will be funded jointly by the European Union, from the Horizon Europe and Digital Europe Programme, the member states and private contributions.

The four pilot lines selected are:

  • Pilot Line for sub-2nm leading edge system-on-chip leadership (with technology developed by imec in Belgium);
  • Fully Depleted Silicon On Insulator (FD-SOI) Pilot Line (at CEA-Leti in Grenoble, France), with a roadmap towards 7nm, for applications in non-volatile embedded memories, RF & 3D integration;
  • Advanced Heterogeneous System Integration Pilot Line (led by Fraunhofer in Germany);
  • WBG Pilot Line, with Finland’s Tampere University hosting a System-in-Package Fabrication (SiPFAB) pilot line for wide-bandgap devices such as silicon carbide and gallium nitride.

“The selection of these pilot lines marks a pivotal moment for Europe’s semiconductor industry, showcasing the collective commitment of European states to drive technological innovation,” says Kari Leino, chair of the Chips JU Public Authorities Board.

These calls relate to the operational objectives of the ‘Chips for Europe Initiative’, the first pillar of the European Chips Act. This initiative aims to “enhance technological capacity building and foster innovation in cutting-edge chip technology on a substantial scale”. The Chips JU should play a pivotal role in facilitating a significant part of this investment.

“This decision represents a significant milestone for Europe’s semiconductor industry, and we look forward to the realisation of these pilot lines,” says Chips JU executive director Jari Kinaret.

The pilot lines will accelerate process development, test and experimentation, and validation of design concepts. Their implementation is expected to bridge the gap from lab to fab and will be available to a wide range of users, including academia, industry and research institutions.

The next steps include negotiations with the consortia to finalize the Hosting Agreements, Joint Procurement Agreements and the related Grant Agreements by the end of 2024.

Tampere secures €40m EU funding for €40m WBG Pilot Line

Finland’s Tampere University is a partner in the WBG Pilot Line, which focuses on developing wide-bandgap semiconductors and testing and integrating WBG chips. Applications include motor control systems, battery management systems, fast-charging systems, photovoltaic inverters, power supply systems and 5G base stations.

Tampere University’s funding of €40m for the WBG Pilot Line will be provided by both the Finnish government and the European Commission for setting up the System-in-Package Fabrication (SiPFAB) pilot line, providing an environment for testing WBG chips and integrating and packaging chip systems. The grant proposal was prepared in collaboration with the City of Tampere’s Chips from Finland initiative.

The EU grant represents one of the largest ever investments in the development of academic research and innovation infrastructures in Finland, according to Tampere University’s president Keijo Hämäläinen. “In the next few years, we will continue to expand the university’s expertise in semiconductor technology. Tampere will become a major hub of semiconductor expertise in Europe that will attract both academic professionals and new businesses,” he reckons.

“Hosting the pilot line was an important goal in the Chips from Tampere program,” notes Petri Räsänen, director of Business Tampere’s Chips from Tampere program. “The pilot line will enable us to create next-generation chip solutions for electrification, safety and data communications. The next step will be the establishment of a competence center for building semiconductor expertise.”

Tags: GaN SiC



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