AES Semigas


13 September 2022

Aixtron launches G10-SiC 200mm CVD system

At the 19th International Conference on Silicon Carbide and Related Materials (ICSCRM) in Davos, Switzerland, deposition equipment maker Aixtron SE of Herzogenrath, near Aachen, Germany has launched the G10-SiC high-temperature chemical vapor deposition (CVD) system for high-volume manufacturing of the latest-generation silicon carbide (SiC) power devices on 150/200mm SiC wafers.

The G10-SiC system is built on the firm’s established G5 WW C 150mm platform and provides a flexible dual-wafer size configuration of 9x150mm and 6x200mm, which is reckoned to be instrumental for the transition of the SiC industry from 150mm (6-inch) to 200mm (8-inch) wafer diameter.

The new platform is built around the firm’s proven automated wafer cassette-to-cassette loading solution with high-temperature wafer transfer. Combined with high-growth-rate process capabilities, the G10‑SiC provides what is claimed to be best-in-class wafer throughput and throughput per square meter to efficiently use the limited cleanroom space available in semiconductor fabs.

The G10-SiC supports a large variety of device structures including single and double drift layer structures meeting stringent 150mm uniformity requirements of sigma values less than 2% for doping and thickness. The automated wafer loading reduces the risk of particle defects to a minimum, resulting in typical defect counts of <0.02/cm2.

“This is a truly new-generation high-performance system. The new dual wafer size configuration fully supports the transition from today’s 150mm wafer technology and safeguards the investments of our customer for the future,” says Dr Frank Wischmeyer, Aixtron’s vice-president SiC. “With the highest throughput available to date in this form factor, it maximizes the fab’s productivity and capability to ramp even faster. At the same time, the newly developed in-situ top-side wafer temperature control (TTC) solution optimizes the wafer-level process control within a batch as well as from batch-to-batch. This results in predictable high yields meeting tight production specifications at competitive cost levels,” he adds.

Epitaxial layer uniformity is essential to meet a high yield at the device level. The high throughput of the system, paired with low consumption costs per processed wafer, results in the lowest cost per wafer in the industry, Aixtron claims.

“The positive feedback from our partners and customers after evaluation and production qualification of our new G10-SiC system has already generated additional customer interest,” notes CEO & president Dr Felix Grawert. “The G10-SiC is becoming an important building block for our customers’ worldwide production expansion, and we are committed to support this scaling with our system manufacturing, service and process support excellence,” he concludes.

Tags: SiC epitaxy



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