Temescal

Semigas

CLICK HERE: free registration for Semiconductor Today and Semiconductor Today ASIACLICK HERE: free registration for Semiconductor Today and Semiconductor Today ASIA

Join our LinkedIn group!

Follow ST on Twitter

IQE

2 October 2015

SDK to start shipping very low-defect-density SiC epiwafers

Tokyo-based Showa Denko K.K. (SDK) will this month start commercial shipments of a new grade of 4-inch (100mm)- and 6-inch (150mm)-diameter silicon carbide (SiC) epitaxial wafers with very low defect density, under the trade name High-Grade Epi (HGE), for power devices.

Compared with mainstream silicon-based semiconductors, SiC-based power devices can operate under high-temperature, high-voltage, and high-current conditions while substantially reducing energy loss, notes SDK. These features enable the production of smaller, lighter and more energy-efficient power control modules. SiC power devices are already used as power sources for servers in data centers, distributed power supply systems for new energies, and in subway railcars. Demand is expected to grow further as plans have been announced to use SiC power devices in vehicles. Furthermore, efforts are under way to develop SiC-based ultra-high-voltage (10kV-class) devices for use in power generation/transmission systems.

Power modules for high-voltage, high-current applications mainly contain devices with a Schottky barrier diode (SBD) structure and transistors with a MOSFET (metal-oxide-semiconductor field-effect transistor) structure. While SiC is increasingly used in SBDs, it is difficult to use SiC in MOSFETs. As a MOSFET's oxide film - formed on the surface of an epitaxial wafer - is used in device operations, finer surface defect (SD) and various types of crystal defects, including basal plane dislocation (BPD), considerably affect the yield and product quality.

For automotive applications meanwhile, large chips (measuring around 10mm square) are fabricated from epiwafers. This is because one device needs to handle a current as high as 100A. To prevent deterioration in the production yield of such large chips, the epiwafer's defect density should be controlled within 0.1/cm2.

In the new product HGE, SDK has controlled the density of surface defects to within 0.1/cm2 (one-third the existing level of SDK's conventional product) and the density of basal plane dislocations to within 0.1/cm2 (one-hundredth or less compared with the conventional product). As a result, it is now possible to almost eliminate device defects attributable to BPDs (assuming the use of a 10mm square chip). SDK hence believes that the new product will greatly contribute to the commercialization and market expansion of 'full SiC' power modules that combine SiC-SBDs and SiC-MOSFETs.

Using the HGE technology, SDK has also produced SiC epiwafers with a film thickness of 100┬Ám or more, together with low defect density and good uniformity. SDK plans to start commercial shipments of these SiC epiwafers for use in power generation/transmission systems.

See related items:

SDK boosts 6" SiC epi production capacity for power devices from 400 to 1100 wafers per month

Showa Denko launching 6" SiC epiwafers for inverter power devices

Tags: SDK SiC epitaxy

Visit: www.sdk.co.jp

Share/Save/Bookmark
See Latest IssueRSS Feed

AXT